1. Technical Field
The present invention relates to an improved data processing system, and in particular, the present invention is directed to a system and method for providing dynamic characterization observability using functional clocks for system or run-time process characterization.
2. Description of Related Art
In computer chip manufacturing, one important tool used by chip makers to gauge success is by measuring the certain important parameters of the result using silicon characterization. Silicon wafers are created by first growing cylinders of crystalline silicon from a melted silicon solution. These cylinders are sliced into thin disks, or wafers, and later polished. The polished wafers are then cut into small chips, which may be placed within a computer system.
With respect to characterization, chips may often be discarded because they do not meet the testing parameters needed to identify the chip as a good chip. Manufacturing tests are performed to see whether the manufactured chip meets the specifications for the particular type of processor. These tests typically attempt to obtain full test coverage of every device on the chip. For example, tests that may be performed include functional and structural tests. A functional test tests the chip function in normal operation while a structural test specifically focuses on manufacturing defects that might cause the chip to behave differently from normal operations. Some of the tests involve a burden or stress test. Such a process subjects a chip to high temperature and over voltage supply while running production tests.
Current state of the art silicon chip design and manufacturing places characterization circuits on the wafer, such as within the KERF. The KERF is the space between the chips cut from the silicon wafer. The KERF is used by chip makers to perform tests to determine how well the silicon chip was manufactured. Throwaway characterization circuits are typically placed on the KERF at wafer test so that process parameters, such as normal variation during fabrication, can be measured. For instance, oxide thicknesses, channel widths, wire resistance, etc., can be measured typically by observing the frequency of performance screen ring oscillators (PSRO), which are designed to be sensitive to different parameters of the process. Similarly, across-the-chip linewidth variation (ACLV), which is a normal process variation across the chip/wafer, can also be measured. Increasingly, these characterization circuits have also been embedded in the processor chip itself along with the normal functional circuits, instead of only being placed in the KERF, allowing more direct measurement of the chip.
However, in existing systems, observing these process characterization circuits requires the wafer to be connected to a multi-million dollar tester, or at the very minimum the outputs of these circuits somehow be made visible to external C4 pins so the outputs can escape the chip/module to be probed. This scenario is not practical once the chips are put into a real system because of the sheer number of chips and number of test pins that would need to be instrumented. In addition, the necessary signal quality needed to measure the frequency would be difficult to obtain in a complete system. As a result, characterization data is usually collected at wafer test and stored in a database. A drawback of observing characterization only at wafer test is that it is difficult to maintain this data out to the early bringup lab or even later to the field. Also, existing systems do not address situations where the characteristics of the chip change (for example degrade) after initial screening at the wafer (e.g., during burn-in or due to later life degradation mechanisms such as hot electron effects, negative bias temperature instability (NBTI), etc.).
Therefore, it would be advantageous to have a method and system for reading silicon characterization circuitry after the silicon chips have already been assembled in a package and installed in a system.